LETTER FROM THE EDITOR |
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Dear Colleague, Physical AI is moving quickly from concept to implementation, and this week’s issue looks at what it takes to make these systems work at the edge: guaranteed latency, efficient compute, robust perception and deployable software stacks. We’ll highlight technical presentations on RISC-V and embedded GPU architectures for physical AI, segmentation and depth sensing on real edge hardware, as well as the latest industry news in robotics, neuromorphic processing, FPGA-based AI, embodied navigation and AI ISP technology. If you’re working on these kinds of challenges, we’d also like to hear from you: the Call for Presentation Proposals for the 2027 Embedded Vision Summit is now open. The Summit takes place February 2-4 in San Francisco, and we’re looking for practical, technically substantive proposals on topics including physical AI case studies, efficient edge AI techniques and advances in vision-language models. See the 2027 topics list on the Call for Proposals page for inspiration and submit your proposal by August 14. Also, on Wednesday, September 2, we’ll present a webinar on the challenges of physical AI in collaboration with Ambarella. Physical AI now spans robotics, self-driving vehicles, drones, mobile robots, smart cameras and industrial systems that sense and respond in real time. Success depends on a four-stage closed loop: perception, reasoning, action and learning. In this session, Ambarella’s Muneyb Minhazuddin and Pietro Antonio Cicalese examine what it takes to run that loop at the edge. Today, this loop is split: the edge captures the scene while the cloud performs heavy reasoning. But for systems acting in the physical world, the cloud is too slow, networks are not always available and power is limited. The better approach is to run the full loop on the device, managing the concurrency of perception, a vision-language model and a real-time control path all sharing memory bandwidth and thermal budget, while also overcoming the challenges of real-world perception: fast motion, low light, etc. Engineers trust the loop when latency holds to a guaranteed worst case, performance degrades predictably and the system depends on nothing outside the device. More info here. Lastly, I’d like to invite you to participate in our annual Computer Vision and Physical AI Developer Survey. Many providers of the building-block technologies that enable computer vision and physical AI products and systems use the results of this annual survey to guide their priorities. We share the survey results at Alliance events, in white papers and presentations made available throughout the year on the Alliance website, and, of course, with everyone who completes the survey! To show our appreciation, if you are in our target demographic and complete the survey—it takes about 20 minutes—we’ll also provide you with a $250 discount on a full conference pass to the Embedded Vision Summit .Our target demographic for this survey is people who are or have recently been directly involved in an engineering role developing systems or applications using computer vision or other types of physical (sensor-based) AI. Take the Survey. Without further ado, let’s get to the content. Erik Peters |
BUILDING AND DEPLOYING REAL-WORLD ROBOTS |
COMPUTE ARCHITECTURES FOR PHYSICAL AI |
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No RISC, No Reward: Unlocking Extreme Efficiency in Physical AI with RISC-V Deployment of neural networks at the edge is often constrained by the rigidity and integration cost of domain-specific accelerators. In this talk, Mayank Mangla, AI Product Manager and Systems Architect at MIPS, a GlobalFoundries company, addresses the “efficiency wall”: when an accelerator optimized for one architecture (e.g., CNNs) runs another (e.g., transformers), TOPS don’t translate into throughput. Leveraging the extensible RISC-V ISA, he presents a holistic hardware-software co-design that enhances a standard RISC-V CPU with extensions optimized for CNN and vision transformer operations—avoiding a separate accelerator and its integration overhead. Custom instructions provide fine-grained datapath control, cutting data movement and power consumption. He also shares results showing 4x better energy efficiency in physical AI applications. Complementing the hardware, an ISA-aware software ecosystem streamlines moving models from PyTorch/TensorFlow to optimized implementations without manual kernel tuning, decoupling model definition from hardware specifics and enabling AI in use cases from IoT to automotive. |
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Accelerating Physical AI with ROCm: High-Performance ML on AMD Embedded iGPUs Discover how AMD’s ROCm software stack unlocks data center-class ML performance on embedded integrated GPUs, enabling diverse AI workloads from CNNs and transformers to VLMs and LLMs in power-constrained edge environments. In this technical session, Alok Gupta, Senior Technical Marketing Manager at AMD, shows how ROCm, HIP (Heterogeneous- computing Interface for Portability) and hybrid iGPU + NPU architectures on Ryzen AI platforms deliver production-ready inference for physical AI applications spanning autonomous systems, industrial automation and intelligent edge devices. Learn how to leverage AMD’s open-source ecosystem to optimize any ML model topology for embedded deployment while maintaining the flexibility and programmability of full GPU compute. Through performance benchmarks across multiple model architectures, architectural deep dives and demonstrations, viewers gain practical insights into building efficient AI pipelines that scale from vision models to multimodal AI. |
BETTER PERCEPTION ON REAL EDGE HARDWARE |
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From YOLO to SAM: Segmentation Models on Real Edge Hardware Segmentation is fundamental to edge vision—from drivable surface detection to industrial inspection. But how do different approaches actually perform on resource-constrained hardware? This session benchmarks segmentation models across NVIDIA Jetson, NXP i.MX, Kinara NPU and Raspberry Pi with Hailo acceleration, comparing semantic and instance segmentation using YOLO family models with deployment-optimized architectures. Sébastien Taylor, VP of R&D at Au-Zone Technologies, examines both on-target accuracy and real-world inference latency, with recorded demonstrations from actual devices. The talk culminates with SAM-class foundation models on edge hardware—not real time, but illustrating the trade-off between zero-shot generalization and purpose-trained models achieving interactive frame rates. Viewers will leave with practical guidance for matching segmentation model complexity to hardware capability. |
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Invertible Light Technology: A Paradigm Shift for Depth Sensing Invertible Light Technology (ILT) is a physics- and geometry-based depth-sensing approach designed for low algorithmic overhead. Unlike compute-heavy or correlation-intensive methods, ILT performs depth reconstruction using deterministic, invertible math, enabling depth estimation with minimal compute, small memory footprint and predictable latency. Because the algorithm is lightweight, ILT can run alongside host applications on low-cost MCUs or SoCs, eliminating the need for dedicated depth processors, GPUs or NPUs for depth calculation. This reduces system power, cost and thermal load while preserving real-time behavior. By minimizing depth-processing overhead, ILT frees processors and accelerators for higher-level AI tasks on depth data—such as object detection, tracking, scene understanding and sensor fusion—enabling cleaner system partitioning and more scalable embedded vision architectures. In this session, Takeo Miyazawa, Founder and CEO at MagikEye, introduces ILT and shows performance under real-world embedded constraints: compute budget, memory, power, determinism, robustness, scalability and BOM cost. |
UPCOMING INDUSTRY EVENTS |
FEATURED NEWS |
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BrainChip has announced commercial availability and production shipments of AKD1500 neuromorphic processors NVIDIA has introduced new Jetson Thor T2000 and T3000 modules for robotics and edge AI Microchip has released the VectorBlox 3.0 Accelerator SDK to simplify FPGA-based AI implementation Mistral AI has introduced Robostral Navigate, an 8B-parameter embodied navigation model which has outperformed multi-sensor systems using a single RGB sensor Au-Zone has launched the EdgeFirst Perception Index, the first full-pipeline AI vision benchmark |
EDGE AI AND VISION PRODUCT OF THE YEAR WINNER SHOWCASE |
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Visionary.ai AI ISP (Best Camera or Sensor) Visionary.AI’s AI ISP has been awarded the 2026 Edge AI and Vision Product of the Year Award in the Edge AI Cameras and Sensors category. The Visionary.ai ISP is the world’s first fully end-to-end ISP pipeline. The AI ISP is designed to run at the edge, on NPU, making it flexible, chip-area-efficient and software-defined. This breakthrough builds upon Visionary.ai’s AI video denoiser, extending it into a full imaging pipeline. Unlike other edge AI software which address individual ISP blocks, Visionary.ai’s solution constitutes a full AI software ISP. The AI ISP delivers superior video quality across all lighting and motion conditions, in real-time, with reduced blur and noise, increased sharpness and color accuracy, stronger temporal stability and fewer artifacts. In addition, the ISP improves object detection, enhancing computer vision accuracy downstream. Results in low light show over 75% increase in detection accuracy, and 91% reduction in false positives. The software works hand-in-hand with Visionary.ai’s custom neural network training platform, enabling a flexible, custom neural network for each customer. Visionary,ai believes that this positions the AI ISP to render the conventional hardware ISP as obsolete in the future. Please see here for more information on Visionary.AI’s AI ISP. The Edge AI and Vision Product of the Year Awards celebrate the innovation of the industry’s leading companies that are developing and enabling the next generation of edge AI and computer vision products. Winning a Product of the Year award recognizes a company’s leadership in edge AI and computer vision as evaluated by independent industry experts. |
