MathWorks Demonstration of Its IP Core Generation Workflow

Steve Kuznicki, Pilot Engineer at MathWorks, demonstrates the company's latest embedded vision technologies and products at the September 2016 Embedded Vision Alliance Member Meeting. Specifically, Kuznicki demonstrates the company's IP core generation workflow, which takes advantage of the HDL Coder automatic code generation support in MATLAB and Simulink, and targets a Xilinx evaluation board.

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