Andes Showcases Expanding RISC-V Ecosystem and Next-generation “Cuzco” High-performance CPU at RISC-V Summit North America 2025

San Jose, CA October 17, 2025 –– Andes Technology, a Founding Premier Member of RISC-V International and a leading supplier of high-efficiency, high-performance RISC-V processor IPs, will highlight its expanding ecosystem and preview its next-generation out-of-order CPU—code-named “Cuzco”—at RISC-V Summit North America 2025, taking place October 22–23 in Santa Clara, California.

Building on its success in bringing RISC-V to the mainstream, Andes is now extending its leadership into the high-performance domain. Cuzco, first revealed at Hot Chips 2025, introduces a time-based out-of-order microarchitecture engineered to deliver high performance and efficiency across compute-intensive applications in AI, datacenter, networking, and automotive markets. The Cuzco design is RVA23-compatible and represents the first in a new class of Andes CPUs aimed at datacenter-class performance while maintaining power efficiency and area leadership.

“Andes took RISC-V mainstream. Now we’re bringing it to the forefront of high-performance computing,” said Frankwell Lin, CEO of Andes Technology. “Our next-generation Cuzco CPU architecture, together with our strong ecosystem partners, showcases how RISC-V innovation is accelerating across every layer—from CPU IP to SoC design, analytics, and AI deployment.”

Andes Experts to Present at RISC-V Summit, Driving the Next Wave of RISC-V Leadership

Andes’ technical leaders will share six sessions during the Summit, offering deep insights into the latest advances in RISC-V computing:

Wednesday, October 22

11:30 AM | RISC-V is Ready for Powering the Era of Intelligent General Computing by Dr. Charlie Su, President and CTO

2:15 PM | Pushing the Packed SIMD Extension Over the Line by Rich Fuhler

2:55 PM | AI-Ready RISC-V Using On-Chip Monitoring for Performance & Reliability at Scale by Ziv Paz (proteanTecs) and Marc Evans (Andes)

4:15 PM | Lightning Round — Andes’ Next-Gen OOO RISC-V CPU IP: Cuzco – High-Performance, RVA23-Compliant by Marc Evans

Thursday, October 23

10:30 AM | Demo Theater — From Blueprint to Reality—Navigating SoC Tradeoffs, IP & Ecosystem by Darren Jones

11:10 AM | Enhancing OP-TEE for Enabling RTOS Integration by Bing Yu

Showcasing a Growing RISC-V Ecosystem

At Booth P6, Andes will host live partner showcases that underscore the breadth and depth of the RISC-V ecosystem surrounding its cores:

  • Arteris IP – · joint demonstration of Andes’ Qilai SoC featuring Arteris’ silicon-proven Network-on-Chip IP (also showcased at the Arteris booth)
  • Baya Systems –  comprehensive platform for scalable, physically-aware single and multi-die fabric architectures, demonstrating WeaverPro™ simulation with Andes’ IP (at the Andes booth)
  • BrainChip – neuromorphic compute solutions leveraging RISC-V control
  • proteanTecs – in-chip monitoring and analytics for performance and reliability
  • S2C EDA – FPGA prototyping solutions featuring Andes processors

This lineup highlights Andes’ continued collaboration across the RISC-V value chain—from design and verification to AI integration and scalable system performance.

Visit Booth P6 – Follow & Win!

Attendees are invited to visit Booth P6 to connect with Andes’ experts, our ecosystem partners, and follow Andes Technology on LinkedIn to enter the booth raffle for a chance to win prizes!

View the RISC-V Summit Agenda | Register Now!

About Andes Technology

As a Founding Premier member of RISC-V International and a leader in commercial CPU IP, Andes Technology (ISIN: US03420C1099) is driving the global adoption of RISC-V.

Andes’ extensive RISC-V Processor IP portfolio spans from ultra-efficient 32-bit CPUs to high-performance 64-bit Out-of-Order multiprocessor coherent clusters. With advanced vector processing, DSP capabilities, the powerful Andes Automated Custom Extension (ACE) framework, end-to-end AI hardware/software stack, ISO 26262 certification with full compliance, and a robust software ecosystem, Andes unlocks the full potential of RISC-V, empowering customers to accelerate innovation across AI, automotive, communications, consumer electronics, data centers, and mobile devices.

Over 17 billion Andes-powered SoCs are driving innovations globally. Discover more at www.andestech.com and connect with Andes on LinkedIn, X, and YouTube.

Here you’ll find a wealth of practical technical insights and expert advice to help you bring AI and visual intelligence into your products without flying blind.

Contact

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Berkeley Design Technology, Inc.
PO Box #4446
Walnut Creek, CA 94596

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Phone: +1 (925) 954-1411
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