Allen Rush, Fellow at AMD, presents the "How Computer Vision Is Accelerating the Future of Virtual Reality" tutorial at the May 2016 Embedded Vision Summit. Virtual reality (VR) is the new focus for a wide variety of applications including entertainment, gaming, medical, science, and many others. The technology driving the VR user experience has advanced […]
The substantial parallel processing resources available in modern graphics processors makes them a natural choice for implementing vision-processing functions. The rapidly maturing OpenCL framework enables the rapid and efficient development of programs that execute across GPUs and other heterogeneous processing elements within a system. In this article, we briefly review parallelism in computer vision applications,
Optimizing Computer Vision Applications Using OpenCL and GPUs Read More +
This introductory article discusses implementing machine learning algorithms on FPGAs, achieving significant performance improvements at much lower power. Newly available middleware IP, together with the SDAccel programming environment, enables software developers to implement convolutional neural networks (CNNs) in C/C++, leveraging an OpenCL platform model. Machine Learning in the Cloud: A Tipping Point The transformation of
Accelerating Machine Learning: Implementing Deep Neural Networks on FPGAs Read More +
The substantial resources available in modern programmable logic devices, in some cases including embedded processor cores, makes them strong candidates for implementing vision-processing functions. The rapidly maturing OpenCL framework enables the rapid and efficient development of programs that execute across programmable logic fabric and other heterogeneous processing elements within a system. As mentioned in the
OpenCL Streamlines FPGA Acceleration of Computer Vision Read More +
Nagesh Gupta, CEO and Founder of Auviz Systems, presents the "Trade-offs in Implementing Deep Neural Networks on FPGAs" tutorial at the May 2015 Embedded Vision Summit. Video and images are a key part of Internet traffic—think of all the data generated by social networking sites such as Facebook and Instagram—and this trend continues to grow.
Harris Gasparakis, OpenCV Manager at AMD, presents the "Understanding Adaptive Machine Learning Vision Algorithms and Implementing them on GPUs and Heterogeneous Platforms" tutorial at the May 2015 Embedded Vision Summit. Machine learning algorithms are pervasive in computer vision: from object detection to object tracking to full scene recognition, generative or discriminative learning dominates the space,
Dan Isaacs, Director of Smarter Connected Systems at Xilinx, and Robert Chappell, Founder of EyeTech Digital Systems, co-present the "Implementing Eye Tracking for Medical, Automotive and Headset Applications" tutorial at the May 2015 Embedded Vision Summit. When humans communicate with each other, we get important cues from watching each other’s eyes. Similarly, machines can gain
This article was originally published at John Day's Automotive Electronics News. It is reprinted here with the permission of JHDay Communications. Cameras installed in various locations around a vehicle exterior, in combination with cost-effective, powerful and energy-efficient processors, deliver numerous convenience and protection benefits. The advanced driver assistance systems (ADAS) market is one of the
Smart Exterior Cameras Enhance Vehicle Safety, Security Read More +
This article was originally published at John Day's Automotive Electronics News. It is reprinted here with the permission of JHDay Communications. Cameras installed in various locations around a vehicle exterior, in combination with cost-effective, powerful and energy-efficient processors, deliver numerous convenience and protection benefits. The advanced driver assistance systems (ADAS) market is one of the
Smart Exterior Cameras Enhance Vehicle Safety, Security Read More +
Kintex UltraScale KU115 FPGA is now shipping SAN JOSE, Calif., Nov. 4, 2014 – Xilinx, Inc. (NASDAQ: XLNX) today announced the expansion of its 20 nm portfolio with shipment of the Kintex® UltraScaleTM KU115 FPGA. As the flagship of the Kintex UltraScale family, the KU115 offers the highest DSP count available in a single programmable
Here you’ll find a wealth of practical technical insights and expert advice to help you bring AI and visual intelligence into your products without flying blind.
Berkeley Design Technology, Inc.
PO Box #4446
Walnut Creek, CA 94596
