Processors

Processors for Embedded Vision

THIS TECHNOLOGY CATEGORY INCLUDES ANY DEVICE THAT EXECUTES VISION ALGORITHMS OR VISION SYSTEM CONTROL SOFTWARE

This technology category includes any device that executes vision algorithms or vision system control software. The following diagram shows a typical computer vision pipeline; processors are often optimized for the compute-intensive portions of the software workload.

ev pipeline

The following examples represent distinctly different types of processor architectures for embedded vision, and each has advantages and trade-offs that depend on the workload. For this reason, many devices combine multiple processor types into a heterogeneous computing environment, often integrated into a single semiconductor component. In addition, a processor can be accelerated by dedicated hardware that improves performance on computer vision algorithms.

General-purpose CPUs

While computer vision algorithms can run on most general-purpose CPUs, desktop processors may not meet the design constraints of some systems. However, x86 processors and system boards can leverage the PC infrastructure for low-cost hardware and broadly-supported software development tools. Several Alliance Member companies also offer devices that integrate a RISC CPU core. A general-purpose CPU is best suited for heuristics, complex decision-making, network access, user interface, storage management, and overall control. A general purpose CPU may be paired with a vision-specialized device for better performance on pixel-level processing.

Graphics Processing Units

High-performance GPUs deliver massive amounts of parallel computing potential, and graphics processors can be used to accelerate the portions of the computer vision pipeline that perform parallel processing on pixel data. While General Purpose GPUs (GPGPUs) have primarily been used for high-performance computing (HPC), even mobile graphics processors and integrated graphics cores are gaining GPGPU capability—meeting the power constraints for a wider range of vision applications. In designs that require 3D processing in addition to embedded vision, a GPU will already be part of the system and can be used to assist a general-purpose CPU with many computer vision algorithms. Many examples exist of x86-based embedded systems with discrete GPGPUs.

Digital Signal Processors

DSPs are very efficient for processing streaming data, since the bus and memory architecture are optimized to process high-speed data as it traverses the system. This architecture makes DSPs an excellent solution for processing image pixel data as it streams from a sensor source. Many DSPs for vision have been enhanced with coprocessors that are optimized for processing video inputs and accelerating computer vision algorithms. The specialized nature of DSPs makes these devices inefficient for processing general-purpose software workloads, so DSPs are usually paired with a RISC processor to create a heterogeneous computing environment that offers the best of both worlds.

Field Programmable Gate Arrays (FPGAs)

Instead of incurring the high cost and long lead-times for a custom ASIC to accelerate computer vision systems, designers can implement an FPGA to offer a reprogrammable solution for hardware acceleration. With millions of programmable gates, hundreds of I/O pins, and compute performance in the trillions of multiply-accumulates/sec (tera-MACs), high-end FPGAs offer the potential for highest performance in a vision system. Unlike a CPU, which has to time-slice or multi-thread tasks as they compete for compute resources, an FPGA has the advantage of being able to simultaneously accelerate multiple portions of a computer vision pipeline. Since the parallel nature of FPGAs offers so much advantage for accelerating computer vision, many of the algorithms are available as optimized libraries from semiconductor vendors. These computer vision libraries also include preconfigured interface blocks for connecting to other vision devices, such as IP cameras.

Vision-Specific Processors and Cores

Application-specific standard products (ASSPs) are specialized, highly integrated chips tailored for specific applications or application sets. ASSPs may incorporate a CPU, or use a separate CPU chip. By virtue of their specialization, ASSPs for vision processing typically deliver superior cost- and energy-efficiency compared with other types of processing solutions. Among other techniques, ASSPs deliver this efficiency through the use of specialized coprocessors and accelerators. And, because ASSPs are by definition focused on a specific application, they are usually provided with extensive associated software. This same specialization, however, means that an ASSP designed for vision is typically not suitable for other applications. ASSPs’ unique architectures can also make programming them more difficult than with other kinds of processors; some ASSPs are not user-programmable.

Samsung Foundry and Cadence: Accelerating Chiplet Solutions for Physical AI

This blog post was originally published at Samsung Semiconductor’s website. It is reprinted here with the permission of Samsung Semiconductor. Artificial Intelligence (AI) is rapidly expanding beyond digital environments and into the physical world. AI-driven systems that give machines the ability to perceive, comprehend, learn from, and respond to real-time environments are quickly moving from

Read More »

Analog Devices to Acquire Empower Semiconductor, Expanding its Next-Generation High-Density Power Portfolio for the AI Era

Key Takeaways: Addresses a critical challenge in AI – delivering high-density, energy-efficient compute as power and thermal demands limit system scale Further advances ADI’s position as a leading strategic, system-level grid-to-core power partner for hyperscalers and AI silicon developers Expands ADI’s total addressable market in AI compute power delivery with Integrated Voltage Regulator (IVR) and

Read More »

The Software Gap Holding AI Back: What Semiconductor Leaders Can Learn From the EV Transition

This blog post was originally published at HTEC’s website. It is reprinted here with the permission of HTEC. The story of EV adoption contains a warning that semiconductor companies would be wise to take seriously. When the automotive industry made the leap from combustion engines to electric drivetrains, it discovered that a transformative technology is not enough on its own. The

Read More »

AMD’s Embedded Computing Summit Comes to London and Eindhoven

On June 16, 2026 in London, and on June 18, 2026 in Eindhoven, the AMD “Embedded Computing Summit Global Technical Tour” comes to Europe. From the event page: Where Embedded Innocation Meets Technical Depth The Embedded Computing Summit (ECS) Global Technical Tour is the premier in-person technical event series from AMD, bringing together engineers, architects,

Read More »

Google Research and Synaptics Partner to Showcase Immersive Edge AI Experiences Powered by the Coralboard at Google I/O 2026

San Jose, CA, May 19, 2026 – Synaptics® Incorporated (Nasdaq: SYNA) and Google Research will spotlight Edge AI use cases on the recently announced Synaptics Coralboard™ at Google I/O 2026. The Coralboard is designed to help developers move faster from prototyping to real-world Edge AI product development. Powered by the Synaptics Astra™ SL2610 product line with the Synaptics Torq™ NPU and Coral NPU

Read More »

Upcoming Event on AI Transformation

KOTRA Silicon Valley will host “Physical AI Superconnect 2026,” on June 24, 2026, from 10:00 am to 8:00 pm PDT at the Computer History Museum in Mountain View, California. The event will feature insightful presentations, technology exhibits, matchmaking and networking. From the event page: ​M.AX: A New Era of Manufacturing AI Transformation ​​Physical AI Superconnect

Read More »

The New Baseline for Human-Centric Devices Starts with Always-On Edge AI Audio: Introducing the Synaptics® Astra™ SR80 Series

This blog post was originally published at Synaptics’ website. It is reprinted here with the permission of Synaptics. The devices we wear, carry, and live with are becoming our most personal AI companions—and that demands they be always aware, always private, and always delivering exceptional audio. The Astra™ SR80 Series delivers always-on Edge AI processing and

Read More »

Designing with Efinix FPGA DSP Blocks

This blog post was originally published at Efinix’s website. It is reprinted here with the permission of Efinix. Today’s most advanced digital signal processing (DSP) solutions demand speed, adaptability, and precision — and that’s exactly where FPGAs (Field-Programmable Gate Arrays) shine. As a powerful hardware platform, FPGAs deliver exceptional parallel processing capability, high configurability, and

Read More »

FotoNation and SEMIFIVE Announce Strategic Collaboration for Turnkey Development of TriSilica Perceptual AI Chip Family Using Samsung Foundry

Collaboration to accelerate the commercialization of FotoNation’s ultra-low-power sensor-fusion SoCs for edge AI applications GALWAY, Ireland, and SEOUL, South Korea – May 11 th , 2026 – FotoNation Ltd., a European-based Perception Recognition company and SEMIFIVE Inc., a leading global provider of custom AI semiconductor solutions, today announced a strategic collaboration agreement under which SEMIFIVE

Read More »

Scalable FPGA Prototyping for AI SoCs: Handling Massive Parallelism and Bandwidth

This blog post was originally published at Tessolve’s website. It is reprinted here with the permission of Tessolve. Creating an AI System-on-Chip (SoC) today resembles conducting a thousand musicians playing different melodies at once; each note, or data stream, must align perfectly. As AI workloads become increasingly complex, prototyping these SoCs on FPGA (Field Programmable

Read More »

NPX6 NPU IP Accelerates Physical AI SoC Performance

To meet the evolving performance and power-efficiency needs of generative AI (GenAI) and Physical AI models targeting for AI-driven SoCs, Synopsys has announced an enhanced version of its silicon-proven ARC® NPX6 NPU IP family of AI accelerators. These enhanced NPU IPs, which are software-compatible with existing NPX6 IP families, include: AI Data Compression: An enhanced

Read More »

FotoNation Completes a Pre-A Round to Fund the Development of its TriSilica Chip Lead by Enterprise Ireland and Silicon Gardens

GALWAY, Ireland, May 7, 2026 /PRNewswire/ — FotoNation® LTD., a Galway-based company, announced it has closed its Pre-A round led by Enterprise-Ireland and Silicon Gardens, with participation from other notable Angels. This capital will accelerate FotoNation’s mission to develop its TriSilica® product: an ultra-low-power, perception-AI chip. Specifically, the funds will be used to progress the completion of the MPW prototype,

Read More »

Gateworks and NXP Powers the Future of the Industrial Edge with M.2 AI Acceleration Card

This news blog post was originally published at NXP Semiconductors’ website. It is reprinted here with the permission of NXP Semiconductors. Gateworks, an NXP Gold Partner, is a leader in embedded computing solutions for edge AI and industrial connectivity. Bringing decades of experience and deep integration within NXP’s ecosystem, Gateworks delivers USA-made, industrial-grade platforms, complemented

Read More »

New Synopsys.ai Copilots Deliver 2–5× Faster Chip Design Productivity

AI-assisted semiconductor design and verification is no longer just a concept. It is now a full-fledged reality that is delivering remarkable productivity gains. Five new Synopsys.ai Copilot assistants and advisors are now commercially available, putting expert-level guidance and creativity at engineers’ fingertips. Thousands of users across leading semiconductor companies are already harnessing this first-of-its-kind generative AI technology to

Read More »

Accelerating AI Innovation at the Edge with the Ara240 Discrete Neural Processing Unit (NPU)

This blog post was originally published at NXP Semiconductors’ website. It is reprinted here with the permission of NXP Semiconductors. As AI workloads grow with larger, multimodal models and on-device generative and agentic AI, edge systems need more than incremental compute. They require dedicated acceleration for real-time performance, lower power, strong data privacy, and scalability. The Ara240

Read More »

Addressing Technical Challenges in Next-Gen Smart Lock Design

This blog post was originally published at Renesas’ website. It is reprinted here with the permission of Renesas. From Connectivity Standards Alliance’s Matter™ and Aliro™ to Biometric Authentication The growing demand for secure, easy-to-use, and seamlessly integrated access solutions is driving smart locks to the forefront of residential and commercial access control. Expansion of smart home

Read More »

Modern Trends in Floating-Point

This blog post was originally published at Imagination Technologies’ website. It is reprinted here with the permission of Imagination Technologies. The requirement to support real numbers in computers has existed for as long as computers themselves, yet has always been a more complicated challenge than it at first appears. Why? Because computer-based representations can only represent

Read More »

Here you’ll find a wealth of practical technical insights and expert advice to help you bring AI and visual intelligence into your products without flying blind.

Contact

Address

Berkeley Design Technology, Inc.
PO Box #4446
Walnut Creek, CA 94596

Phone
Phone: +1 (925) 954-1411
Scroll to Top