Somewhat eclipsed by last week’s announcement that the AMD Spartan™ UltraScale+™ FPGA SCU35 Evaluation Kit is now available, AMD and Infineon have disclosed successful validation of Infineon’s 64-Mb HYPERRAM™ memory and HYPERRAM controller IP on the platform. This collaboration expands the kit’s value for engineers building edge AI and computer vision systems.
The SCU35 kit, built around the Spartan UltraScale+ SU35P device, is marketed as an affordable platform for industrial, medical, and data center designs that need I/O expansion and board-management capabilities—making it a solid fit for cost-sensitive, low-power edge systems that demand high I/O density and robust security features.
By qualifying Infineon’s 64-Mb HYPERRAM and controller IP with the SCU35 kit and AMD’s MicroBlaze™ V soft-core RISC-V processor, AMD effectively adds a pre-integrated, high-bandwidth external memory option that requires minimal pins and board resources. The MicroBlaze V core is a 32-bit RISC-V soft processor IP fully integrated into Vivado™ and Vitis™ flows, and the HYPERRAM controller IP provides a verified host interface, simplifying integration.
For edge vision and AI workloads, this combination addresses several common design constraints:
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Memory bandwidth with low pin count: HYPERRAM, accessed over the HYPERBUS™ interface, delivers DRAM-class bandwidth via a very small pin footprint (HyperBus devices use a narrow bus with only a handful of signals), which is valuable when the FPGA I/O budget is already consumed by image sensors, high-speed interfaces, or control signals.
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Power- and cost-efficient buffering: A 64-Mb (8-MB) HYPERRAM device provides ample external storage for frame buffers, intermediate feature maps, or scratchpad memory for pre/post-processing, without the power, complexity, or BOM impact of traditional LPDDR solutions—key for battery-powered cameras, smart sensors, and distributed industrial nodes.
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Faster path from prototype to production: Infineon’s HYPERBUS memory controller IP is delivered as fully implemented and verified RTL with documentation, providing a proven memory interface for the SCU35 kit. Combined with AMD’s Vivado and Vitis tools and MicroBlaze V support, this reduces the effort required to bring up external memory, allowing teams to focus on vision pipelines, ML kernels, and system-level optimization.
Typical edge AI and vision applications that can benefit include multi-sensor IoT gateways, smart cameras, access-control terminals, industrial monitoring nodes, and other embedded systems that need modest AI acceleration, secure connectivity, and reliable control-plane processing rather than large, data-center-scale models.
Infineon’s 64-Mb HYPERRAM devices and corresponding controller IP are supported and licensed for use with the SCU35 platform, and the AMD Spartan UltraScale+ FPGA SCU35 Evaluation Kit is available for order today, with shipments scheduled to begin in January 2026. For members of the engineering community, the combination of an affordable, globally available FPGA kit and a validated, low-pin-count external memory solution provides a practical, production-relevant starting point for next-generation edge AI and computer vision designs.
