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GEO Semiconductor Selects Cadence Tensilica Vision P5 DSP for Their Most Advanced Automotive Smart Viewing Camera Processor

Cadence, News /

Integration of the Vision P5 DSP allows OEMs to run computer vision applications to enable enhanced automated driving experiences SAN JOSE, Calif., February 26, 2018—Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that GEO Semiconductor (GEO) selected the Cadence® Tensilica® Vision P5 DSP for GEO’s new GW5400 camera video processor. According to GEO, their GW5400 […]

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Cadence Demonstration of On-Device AI for Image Classification

Cadence, Summit 2018, Videos /

Megha Daga, senior technical marketing manager at Cadence, delivers a product demonstration at the May 2018 Embedded Vision Summit. Specifically, Daga demonstrates the highly capable Tensilica Vision P6 DSP, which does both computer vision and AI processing. The demo showcases Cadence’s automatic code generation tool for neural networks, the Xtensa Neural Network Compiler, which accepts

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Cadence Demonstration of On-Device AI for Object Detection

Cadence, Summit 2018, Videos /

Megha Daga, senior technical marketing manager at Cadence, delivers a product demonstration at the May 2018 Embedded Vision Summit. Specifically, Daga demonstrates the power of the Tensilica Vision P6 DSP to perform both computer vision and AI processing. The demo detects all the faces in the camera view using the Tiny Yolo V2 network, and

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“Neural Network Compiler: Enabling Rapid Deployment of DNNs on Low-Cost, Low-Power Processors,” a Presentation from Cadence

Algorithms & Models, Cadence, Processors, Software, Summit 2018, Tools, Videos /

Megha Daga, Senior Technical Marketing Manager at Cadence, presents the “Neural Network Compiler: Enabling Rapid Deployment of DNNs on Low-Cost, Low-Power Processors” tutorial at the May 2018 Embedded Vision Summit. The use of deep neural networks (DNNs) has accelerated in recent years, with DNNs making their way into diverse commercial products. But DNNs consume vast

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“The Perspective Transform in Embedded Vision,” a Presentation from Cadence

Algorithms & Models, Cadence, Processors, Software, Summit 2018, Tools, Videos /

Shrinivas Gadkari, Design Engineering Director, and Aditya Joshi, Lead Design Engineer, both of Cadence, present the “Perspective Transform in Embedded Vision” tutorial at the May 2018 Embedded Vision Summit. This presentation focuses on the perspective transform and its role in many state-of-the-art embedded vision applications like video stabilization, high dynamic range (HDR) imaging and super

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OpenVX Implementations Deliver Robust Computer Vision Applications

Algorithms & Models, Articles, Cadence, Edge AI and Vision Alliance, Intel, NXP Semiconductors, Processors, Software, Technical Articles, Tools, VeriSilicon /

Key to the widespread adoption of embedded vision is the ease of developing software that runs efficiently on a diversity of hardware platforms, with high performance, low power consumption and cost-effective system resource needs. In the past, this combination of objectives has been a tall order, since it has historically required significant code optimization for

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OpenVX Enhancements, Optimization Opportunities Expand Vision Software Development Capabilities

Algorithms & Models, Articles, Cadence, Edge AI and Vision Alliance, Intel, NXP Semiconductors, Processors, Software, Technical Articles, Tools, VeriSilicon /

Key to the widespread adoption of embedded vision is the ease of developing software that runs efficiently on a diversity of hardware platforms, with high performance, low power consumption and cost-effective system resource needs. In the past, this combination of objectives has been a tall order, since it has historically required significant code optimization for

OpenVX Enhancements, Optimization Opportunities Expand Vision Software Development Capabilities Read More +

“Techniques to Reduce Power Consumption in Embedded DNN Implementations,” a Presentation from Cadence

Algorithms & Models, Cadence, Processors, Software, Tools, Videos /

Samer Hijazi, Deep Learning Engineering Group Director at Cadence, presents the "Techniques to Reduce Power Consumption in Embedded DNN Implementations" tutorial at the May 2017 Embedded Vision Summit. Deep learning is becoming the most widely used technique for computer vision and pattern recognition. This rapid adoption is primarily driven by the outstanding effectiveness deep learning

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“Scalable Neural Network Processors for Embedded Applications,” a Presentation from Cadence

Algorithms & Models, Cadence, Processors, Software, Tools, Videos /

Pulin Desai, Director of Product Marketing at Cadence, presents the "Scalable Neural Network Processors for Embedded Applications" tutorial at the May 2017 Embedded Vision Summit. This presentation describes the architecture of the latest Tensilica-based neural network processor IP and illustrates how easily different neural networks can be run using it. See how this low-power architecture

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Here you’ll find a wealth of practical technical insights and expert advice to help you bring AI and visual intelligence into your products without flying blind.

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PO Box #4446
Walnut Creek, CA 94596

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