Cadence

Cadence x MosChip Demo: On-Device SLM Voice Agent on a Vision DSP (Cloud-Free Conversational AI)

  This demonstration by MosChip and Cadence shows a Small Language Model (SLM) voice assistant running entirely on-device on the Cadence Tensilica Vision Q7 DSP within an Axera AX650N platform – with no cloud connection. It walks through the full interaction loop: spoken input is converted to text, a compact quantized language model (SLM) generates […]

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Vedya Labs Demonstration of Stable Diffusion Deployment on Cadence Tensilica DSPs

Suresh Pasupuleti, Managing Director of Vedya Labs, presents the company’s work in bringing Stable Diffusion-based image generation to DSP-centric embedded platforms. The demonstration showcases a nearly 500-million-parameter model running on the Axera AX650N SoC, with the text encoder, U-Net, and VAE stages optimized for dual Cadence Tensilica Vision DSPs. Using INT8 quantization and a combination

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Bolom Sound Classification on Cadence Tensilica HiFi 5

Mauricio Greene of Bolom demonstrates real-time Sound Classification running on the Cadence Tensilica HiFi 5 DSP at the Embedded Vision Summit. Bolom Acoustic Intelligence edge models identify hundreds of distinct sound events and soundscape scenes – such as sirens, alarms, horns, traffic and more, fully on-device and without relying on the cloud. The Tensilica HiFi

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“HiFi iQ: Enabling Voice AI and Immersive Audio for Smart Home, Mobile and Automotive,” a Presentation from Cadence

Amol Borkar, Group Director of Product Management and Marketing—Tensilica DSPs, Silicon Solutions Group (SSG) at Cadence presents “HiFi iQ: Enabling Voice AI and Immersive Audio for Smart Home, Mobile and Automotive” at the May 2026 Embedded Vision Summit. Voice is quickly becoming the primary interface for consumer and enterprise devices,… “HiFi iQ: Enabling Voice AI

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Samsung Foundry and Cadence: Accelerating Chiplet Solutions for Physical AI

This blog post was originally published at Samsung Semiconductor’s website. It is reprinted here with the permission of Samsung Semiconductor. Artificial Intelligence (AI) is rapidly expanding beyond digital environments and into the physical world. AI-driven systems that give machines the ability to perceive, comprehend, learn from, and respond to real-time environments are quickly moving from

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Cadence and NVIDIA Expand Partnership to Reinvent Engineering for the Age of AI and Accelerated Computing

15 Apr 2026 Expanded collaboration combines agentic AI, physics-based simulation, and digital twins to accelerate engineering and unlock new levels of productivity across semiconductors, physical AI systems and AI factories SAN JOSE, Calif.— At CadenceLIVE Silicon Valley 2026, Cadence (Nasdaq: CDNS) announced an expanded partnership with NVIDIA to deliver accelerated solutions across agentic AI, physics-based simulation

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See How ams OSRAM Revolutionize Optical Solutions with the Help of Cadence Tools

OSRAM utilizes the Quantus SNA workflow for high-precision silicon. In modern semiconductor design, Heterogeneous Integration is the new frontier. When light detectors for Medical Imaging or depth sensors for Autonomous Systems are packed onto a single die alongside radio systems, the risk of interference skyrockets. For ‪ams OSRAM‬, “sensing the power of light” means more

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Cadence and NVIDIA Unveil Accelerated Engineering Solutions Purpose-Built for Agentic AI Chip and System Design​

New agentic integrated circuit (IC) and physical AI accelerated solutions enable engineers to solve previously impossible chip, system and AI factory challenges   SAN JOSE, Calif.— Today, Cadence announced an expansion of its broad collaboration with NVIDIA to accelerate Cadence’s Design for AI and AI for Design strategy. The next generation of agentic AI design solutions includes autonomous,

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Cadence Launches Partner Ecosystem to Accelerate Chiplet Time to Market

Strategic collaborations with Samsung Foundry, Arm and others enable Cadence to deliver pre-validated chiplet solutions based on the Cadence Physical AI chiplet platform   SAN JOSE, Calif., January 6, 2026, — Cadence (Nasdaq: CDNS) today announced a Chiplet Spec-to-Packaged Parts ecosystem to reduce engineering complexity and accelerate time to market for customers developing chiplets targeting physical

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Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs

This article was originally published at Cadence’s website. It is reprinted here with the permission of Cadence. Cadence has unveiled 10 Verification IP (VIP) for key emerging interfaces tuned for AI-based designs, including Ultra Accelerator Link (UALink), Ultra Ethernet (UEC), LPDDR6, UCIe 3.0, AMBA CHI-H, Embedded USB v2 (eUSB2), and UniPro 3.0. These new VIP will

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Here you’ll find a wealth of practical technical insights and expert advice to help you bring AI and visual intelligence into your products without flying blind.

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