To meet the evolving performance and power-efficiency needs of generative AI (GenAI) and Physical AI models targeting for AI-driven SoCs, Synopsys has announced an enhanced version of its silicon-proven ARC® NPX6 NPU IP family of AI accelerators. These enhanced NPU IPs, which are software-compatible with existing NPX6 IP families, include: AI Data Compression: An enhanced […]
NPX6 NPU IP Accelerates Physical AI SoC Performance Read More +
AI-assisted semiconductor design and verification is no longer just a concept. It is now a full-fledged reality that is delivering remarkable productivity gains. Five new Synopsys.ai Copilot assistants and advisors are now commercially available, putting expert-level guidance and creativity at engineers’ fingertips. Thousands of users across leading semiconductor companies are already harnessing this first-of-its-kind generative AI technology to
New Synopsys.ai Copilots Deliver 2–5× Faster Chip Design Productivity Read More +
This blog post was originally published at Synopsys’s website. It is reprinted here with the permission of Synopsys. With the semiconductor industry shifting from monolithic chip designs to multi-die architectures — which leverage chiplets for improved flexibility, scalability, and time to market — engineering teams are facing new hurdles and complexities. Beyond power, performance, and area (PPA), they
Accelerating Multi-Die Innovation: How Synopsys and Samsung are Shaping Chip Design Read More +
On January 14, 2026, at 7:00 am EST (10:00 am EST) Alliance Member company Synopsys will deliver a webinar “Advances in ATPG: From Power and Timing Awareness to Intelligent Pattern Search with AI” From the event page: As System-on-Chip (SoC) designs become increasingly complex, meeting test quality and cost goals requires advances in automatic test
Upcoming Webinar on Advances in Automatic Test Pattern Generation Read More +
San Jose, California – January 6, 2026 – SiMa.ai today announced the first integrated capability resulting from its strategic collaboration with Synopsys. The joint solution provides a blueprint to accelerate architecture exploration and early virtual software development for AI- ready, next-generation automotive SoCs that support applications such as Advanced Driver Assistance Systems (ADAS) and In-vehicle-Infotainment
Synopsys solutions accelerate innovation from systems to silicon, enabling more than 90% of the top 100 automotive suppliers to boost engineering productivity, predict system performance, and deliver safer, more sustainable mobility Key Takeaways: Synopsys will support the Fédération Internationale de l’Automobile (FIA), the global governing body for motorsport and the federation for mobility organizations
Key Highlights Multiyear collaboration spans NVIDIA CUDA accelerated computing, agentic and physical AI, and Omniverse digital twins to achieve simulation speed and scale previously unattainable through traditional CPU computing — opening new market opportunities across engineering. To further adoption of GPU-accelerated engineering solutions, the companies will collaborate in engineering and marketing activities. NVIDIA invested $2
This blog post was originally published at Synopsys’s website. It is reprinted here with the permission of Synopsys. As the saying goes, with great risk comes great reward. Because of the profound complexity and intricate dependencies between hardware and software, developing a custom AI chip is one of the most capital-intensive and high-risk endeavors in
10 Tips for First-Pass Silicon Success in AI Chip Development Read More +
Joep Boonstra, Synopsys Scientist at Synopsys, presents the “Introduction to Data Types for AI: Trade-offs and Trends” tutorial at the May 2025 Embedded Vision Summit. The increasing complexity of AI models has led to a growing need for efficient data storage and processing. One critical way to gain efficiency is using smaller and simpler data
“Introduction to Data Types for AI: Trade-offs and Trends,” a Presentation from Synopsys Read More +
Transforming ADAS and In-Vehicle Infotainment Breakthroughs with Innovative ML IP, Chiplets, and System-on-Chip Reference Architectures SAN JOSE, Calif., July 30, 2025 /PRNewswire/ — SiMa.ai, a pioneer in ultra-efficient machine learning system-on-chip (MLSoC) platform, today announced the next phase of their strategic collaboration with Synopsys, the leading provider of engineering solutions from silicon to systems, to
Here you’ll find a wealth of practical technical insights and expert advice to help you bring AI and visual intelligence into your products without flying blind.
Berkeley Design Technology, Inc.
PO Box #4446
Walnut Creek, CA 94596
