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“NPU IP Hardware Shaped Through Software and Use-case Analysis,” a Presentation from Ceva

Yair Siegel, Senior Director for Wireless and Emerging Markets at Ceva, presents the “NPU IP Hardware Shaped Through Software and Use-case Analysis” tutorial at the May 2025 Embedded Vision Summit. True innovation in tiny machine learning (tinyML) emerges from a synergy between software ingenuity, real-world application insights and leading-edge processor… “NPU IP Hardware Shaped Through […]

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Nota AI Collaborates with Renesas on High-efficiency Driver Monitoring AI for RA8P1 Microcontroller

AI model optimization powers high-efficiency DMS on ultra-compact MCUs 50FPS real-time performance with ultra-low power and minimal system footprint SEOUL, South Korea, July 2, 2025 /PRNewswire/ — Nota AI, a global leader in AI optimization, today announced a collaboration with Renesas Electronics Corporation, a premier supplier of advanced semiconductor solutions, to deliver an optimized Driver Monitoring

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“Voice Interfaces on a Budget: Building Real-time Speech Recognition on Low-cost Hardware,” a Presentation from Useful Sensors

Pete Warden, CEO of Useful Sensors, presents the “Voice Interfaces on a Budget: Building Real-time Speech Recognition on Low-cost Hardware” tutorial at the May 2025 Embedded Vision Summit. In this talk, Warden presents Moonshine, a speech-to-text model that outperforms OpenAI’s Whisper by a factor of five in terms of speed.… “Voice Interfaces on a Budget:

“Voice Interfaces on a Budget: Building Real-time Speech Recognition on Low-cost Hardware,” a Presentation from Useful Sensors Read More +

Renesas Sets New MCU Performance Bar with 1-GHz RA8P1 Devices with AI Acceleration

Single- and Dual-Core MCUs Combine Arm Cortex-M85 and M33 Cores with Arm Ethos-U55 NPU to Deliver Superior AI Performance up to 256 GOPs Unprecedented 7300+ CoreMarks[1] with Dual Arm CPU cores TSMC 22ULL Process Delivers High Performance and Low Power Consumption Embedded MRAM with Faster Write Speeds and Higher Endurance and Retention Dedicated Peripherals Optimized

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Introducing NVFP4 for Efficient and Accurate Low-precision Inference

This blog post was originally published at NVIDIA’s website. It is reprinted here with the permission of NVIDIA. To get the most out of AI, optimizations are critical. When developers think about optimizing AI models for inference, model compression techniques—such as quantization, distillation, and pruning—typically come to mind. The most common of the three, without

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“Computer Vision at Sea: Automated Fish Tracking for Sustainable Fishing,” a Presentation from Tryolabs and the Nature Conservancy

Alicia Schandy Wood, Machine Learning Engineer at Tryolabs, and Vienna Saccomanno, Senior Scientist at The Nature Conservancy, co-present the “Computer Vision at Sea: Automated Fish Tracking for Sustainable Fishing” tutorial at the May 2025 Embedded Vision Summit. What occurs between the moment a commercial fishing vessel departs from shore and… “Computer Vision at Sea: Automated

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Simplifying Vision AI Development with Renesas AI Model Deployer Powered by NVIDIA TAO

This blog post was originally published at Renesas’ website. It is reprinted here with the permission of Renesas. Edge AI is no longer a futuristic idea—it’s an essential technology driving today’s smart devices across industries, from industrial automation to consumer IoT applications. But building AI applications at the edge still comes with challenges: complexity with

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“Squinting Vision Pipelines: Detecting and Correcting Errors in Vision Models at Runtime,” a Presentation from Squint AI

Ken Wenger, Chief Technology Officer at Squint AI, presents the “Squinting Vision Pipelines: Detecting and Correcting Errors in Vision Models at Runtime” tutorial at the May 2025 Embedded Vision Summit. As humans, when we look at a scene our first impressions are sometimes wrong; we need to take a second… “Squinting Vision Pipelines: Detecting and

“Squinting Vision Pipelines: Detecting and Correcting Errors in Vision Models at Runtime,” a Presentation from Squint AI Read More +

The Outer Loop: The Real Driver of AI Success

This blog post was originally published in expanded form at RapidFire AI’s website. It is reprinted here with the permission of RapidFire AI. When people talk about deep learning, they usually talk about the inner loop—the elegant dance of forward passes, backpropagation, and gradient descent. This is the part that’s been endlessly refined over the

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“ONNX and Python to C++: State-of-the-art Graph Compilation,” a Presentation from Quadric

Nigel Drego, Co-founder and Chief Technology Officer at Quadric, presents the “ONNX and Python to C++: State-of-the-art Graph Compilation” tutorial at the May 2025 Embedded Vision Summit. Quadric’s Chimera general-purpose neural processor executes complete AI/ML graphs—all layers, including pre- and post-processing functions traditionally run on separate DSP processors. To enable… “ONNX and Python to C++:

“ONNX and Python to C++: State-of-the-art Graph Compilation,” a Presentation from Quadric Read More +

Here you’ll find a wealth of practical technical insights and expert advice to help you bring AI and visual intelligence into your products without flying blind.

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