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Highly scalable architecture optimized for computer vision and image workloads with extendable instruction set Shanghai, China, June 26, 2025–VeriSilicon (688521.SH) today released the ZSP5000 Digital Signal Processing (DSP) series IPs, which are based on its fifth-generation silicon-proven DSP architecture. This product line adopts a highly scalable and energy-efficient design, and has been deeply optimized for […]

The energy-efficient architecture scales across AI-enabled devices, including AI phones and AI PCs Shanghai, China, June 9, 2025–VeriSilicon (688521.SH) today announced that its ultra-low energy and high-performance Neural Network Processing Unit (NPU) IP now supports on-device inference of large language models (LLMs) with AI computing performance scaling beyond 40 TOPS. This energy-efficient NPU architecture is

Provide AI acceleration with high computing density, multi-chip scaling, and 3D-stacked memory integration Shanghai, China, June 9, 2025–VeriSilicon (688521.SH) today announced the latest advancements in its high-performance and scalable GPGPU-AI computing IPs, which are now empowering next-generation automotive electronics and edge server applications. Combining programmable parallel computing with a dedicated Artificial Intelligence (AI) accelerator, these

Providing architecture design, software-hardware co-development, and mass production support, and enhancing AI-powered imaging capabilities in smart devices Shanghai, China, June 9, 2025–VeriSilicon (688521.SH) recently announced that its AI-ISP custom chip solution has been successfully adopted in a customer’s mass-produced smartphones, reaffirming the company’s comprehensive one-stop custom silicon service capabilities in AI vision processing. VeriSilicon’s AI-ISP