Processors

Google Research and Synaptics Partner to Showcase Immersive Edge AI Experiences Powered by the Coralboard at Google I/O 2026

San Jose, CA, May 19, 2026 – Synaptics® Incorporated (Nasdaq: SYNA) and Google Research will spotlight Edge AI use cases on the recently announced Synaptics Coralboard™ at Google I/O 2026. The Coralboard is designed to help developers move faster from prototyping to real-world Edge AI product development. Powered by the Synaptics Astra™ SL2610 product line with the Synaptics Torq™ NPU and Coral NPU […]

Google Research and Synaptics Partner to Showcase Immersive Edge AI Experiences Powered by the Coralboard at Google I/O 2026 Read More +

Mythic Acquires Videantis to Build the World’s Most Energy-Efficient AI Compute Platform

Silicon Valley and German engineering unite to create a new AI compute champion for Europe and the world Palo Alto, CA and Hannover, Germany — May 19, 2026 — (BUSINESS WIRE) — Mythic, a pioneer in analog compute-in-memory and architect of the industry’s most energy-efficient AI acceleration technology, today announced it has acquired Videantis GmbH,

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ChiPy: Bridge Neural Networks and C++ on Silicon — Full Inference Pipelines with Zero CPU Round-Trips

This blog post was originally published at Quadric’s website. It is reprinted here with the permission of Quadric. The ChiPy DSL is Quadric’s Python framework for building complete on-chip pipelines. Using YOLOX-M as a case study, we show how backbone inference, box decoding, and NMS run entirely on the Chimera GPNPU — no host CPU intervention,

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Upcoming Event on AI Transformation

KOTRA Silicon Valley will host “Physical AI Superconnect 2026,” on June 24, 2026, from 10:00 am to 8:00 pm PDT at the Computer History Museum in Mountain View, California. The event will feature insightful presentations, technology exhibits, matchmaking and networking. From the event page: ​M.AX: A New Era of Manufacturing AI Transformation ​​Physical AI Superconnect

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The New Baseline for Human-Centric Devices Starts with Always-On Edge AI Audio: Introducing the Synaptics® Astra™ SR80 Series

This blog post was originally published at Synaptics’ website. It is reprinted here with the permission of Synaptics. The devices we wear, carry, and live with are becoming our most personal AI companions—and that demands they be always aware, always private, and always delivering exceptional audio. The Astra™ SR80 Series delivers always-on Edge AI processing and

The New Baseline for Human-Centric Devices Starts with Always-On Edge AI Audio: Introducing the Synaptics® Astra™ SR80 Series Read More +

Designing with Efinix FPGA DSP Blocks

This blog post was originally published at Efinix’s website. It is reprinted here with the permission of Efinix. Today’s most advanced digital signal processing (DSP) solutions demand speed, adaptability, and precision — and that’s exactly where FPGAs (Field-Programmable Gate Arrays) shine. As a powerful hardware platform, FPGAs deliver exceptional parallel processing capability, high configurability, and

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FotoNation and SEMIFIVE Announce Strategic Collaboration for Turnkey Development of TriSilica Perceptual AI Chip Family Using Samsung Foundry

Collaboration to accelerate the commercialization of FotoNation’s ultra-low-power sensor-fusion SoCs for edge AI applications GALWAY, Ireland, and SEOUL, South Korea – May 11 th , 2026 – FotoNation Ltd., a European-based Perception Recognition company and SEMIFIVE Inc., a leading global provider of custom AI semiconductor solutions, today announced a strategic collaboration agreement under which SEMIFIVE

FotoNation and SEMIFIVE Announce Strategic Collaboration for Turnkey Development of TriSilica Perceptual AI Chip Family Using Samsung Foundry Read More +

Scalable FPGA Prototyping for AI SoCs: Handling Massive Parallelism and Bandwidth

This blog post was originally published at Tessolve’s website. It is reprinted here with the permission of Tessolve. Creating an AI System-on-Chip (SoC) today resembles conducting a thousand musicians playing different melodies at once; each note, or data stream, must align perfectly. As AI workloads become increasingly complex, prototyping these SoCs on FPGA (Field Programmable

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NPX6 NPU IP Accelerates Physical AI SoC Performance

To meet the evolving performance and power-efficiency needs of generative AI (GenAI) and Physical AI models targeting for AI-driven SoCs, Synopsys has announced an enhanced version of its silicon-proven ARC® NPX6 NPU IP family of AI accelerators. These enhanced NPU IPs, which are software-compatible with existing NPX6 IP families, include: AI Data Compression: An enhanced

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FotoNation Completes a Pre-A Round to Fund the Development of its TriSilica Chip Lead by Enterprise Ireland and Silicon Gardens

GALWAY, Ireland, May 7, 2026 /PRNewswire/ — FotoNation® LTD., a Galway-based company, announced it has closed its Pre-A round led by Enterprise-Ireland and Silicon Gardens, with participation from other notable Angels. This capital will accelerate FotoNation’s mission to develop its TriSilica® product: an ultra-low-power, perception-AI chip. Specifically, the funds will be used to progress the completion of the MPW prototype,

FotoNation Completes a Pre-A Round to Fund the Development of its TriSilica Chip Lead by Enterprise Ireland and Silicon Gardens Read More +

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